TAILIEUCHUNG - PHASE LOCKED LOOPS

The phase locked loop is a feedback system comprised of a phase comparator, a low pass filter and error amplifier in the forward signal path and a voltage-controlled oscillator (VC0) in the feedback path. The block diagram of a basic PLL system is shown. Perhaps the single most important point to realize when designing with the PLL is that it is a feedback system and, hence, is characterized mathematically by the same questions that apply to other, more conventional feedback systems. The parameters in the equations are somewhat different, however since the feedback error signal in the phase locked system is related to phase rather than. | EE 458 LAB REPORT EXPERIMENT 3 PHASE LOCKED LOOPS Purpose The objectives of this laboratory are 1. To introduce students to Phase Locked Loops PLL and their operation. 2. To predict and measure the PLL characteristics. 3. To set up practical circuits using the PLL. Equipment List 1. PC with Matlab and Simulink The Phase Locked Loop Principle The phase locked loop is a feedback system comprised of a phase comparator a low pass filter and error amplifier in the forward signal path and a voltage-controlled oscillator VC0 in the feedback path. The block diagram of a basic PLL system is shown. Perhaps the single most important point to realize when designing with the PLL is that it is a feedback system and hence is characterized mathematically by the same questions that apply to other more conventional feedback systems. The parameters in the equations are somewhat different however since the feedback error signal in the phase locked system is related to phase rather than to current or voltage as is usually the case in conventional feedback systems. LOOP OPERATIONS Figure 3 A a PLL operation From a qualitative point of view the basic principle of PLL operation can be briefly explained. With no signal input applied to the system the error voltage Ve is equal to 0. The VCO operates at a set frequency wo which is known as the free-running frequency. If an input signal is applied to the system the phase comparator compares the phase and frequency of the input signal with the VCO frequency and generates an error voltage Ve t that is related to the phase and the frequency difference between the two signals. This error voltage is then filtered amplified and applied to the control terminal of the VCO. In this manner the control voltage vd t forces the VCO frequency to vary in a direction that reduces the frequency difference between fo and the input signal. If the input frequency wi is sufficiently close to wo the feedback nature of the PLL causes the VCO to synchronize or lock

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