TAILIEUCHUNG - Sequential Verulog Topics part 5

Switch-level modeling is at a very low level of design abstraction. Designers use switch modeling in rare cases when they need to customize a leaf cell. | Team LiB Summary We discussed the following aspects of Verilog in this chapter Switch-level modeling is at a very low level of design abstraction. Designers use switch modeling in rare cases when they need to customize a leaf cell. Verilog design at this level is becoming less popular with increasing complexity of circuits. MOS CMOS bidirectional switches and supplyl and supplyO sources can be used to design any switch-level circuit. CMOS switches are a combination of MOS switches. Delays can be optionally specified for switch elements. Delays are interpreted differently for bidirectional devices. Team LiB Team LiB Exercises 1 Draw the circuit diagram for an xor gate using nmos and pmos switches. Write the Verilog description for the circuit. Apply stimulus and test the design. 2 Draw the circuit diagram for and and or gates using nmos and pmos switches. Write the Verilog description for the circuits. Apply stimulus and test the design. 3 Design the l-bit full-adder shown below using the xor and and or gates built in Exercise 1 and Exercise 2 above. Apply stimulus and test the design. 4 Design a 4-bit bidirectional bus switch that has two buses BusA and BusB on one side and a single bus BUS on the other side. A 1-bit control signal is used for switching. BusA and BUS are connected if control 1. BusB and BUS are connected if control 0. Hint Use the switches tranifO and tranifl. Apply stimulus and test the design. 5 Instantiate switches with the following delay specifications. Use your own input output port names. a. A pmos switch with rise 2 and fall 3. b. An nmos switch with rise 4 fall 6 turn-off 5 c. A cmos switch with delay 6 d. A tranifl switch with turn-on 5 turn-off 6 e. A tranifO with delay 3. Team LiB Team LiB UDP basics In this section we describe parts of a UDP definition and rules for UDPs. Parts of UDP Definition Figure 12-1 shows the distinct parts of a basic UDP definition in pseudo syntax form. For details see the formal syntax

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