TAILIEUCHUNG - Giới thiệu về IP và ATM - Thiết kế và hiệu suất P5

Fundamentals of Simulation those vital statistics DISCRETE TIME SIMULATION This chapter is intended as an introduction to simulation and, in particular, its application to cell- and packet-based queueing. For anyone wanting a more comprehensive treatment of the subject of simulation in general, we refer to []. We will introduce the subject of simulation by concentrating on a discrete version of the M/D/1 queue, applicable to the study of ATM cell buffering. | Introduction to IP and ATM Design Performance With Applications Analysis Software Second Edition. J M Pitts J A Schormans Copyright 2000 John Wiley Sons Ltd ISBNs 0-471-49187-X Hardback 0-470-84166-4 Electronic 5 Fundamentals of Simulation those vital statistics DISCRETE TIME SIMULATION This chapter is intended as an introduction to simulation and in particular its application to cell- and packet-based queueing. For anyone wanting a more comprehensive treatment of the subject of simulation in general we refer to . We will introduce the subject of simulation by concentrating on a discrete version of the M D 1 queue applicable to the study of ATM cell buffering. There are two basic ways to simulate such a queue discrete time advance discrete event advance In the former the simulator moves from time instant i to time instant i 1 regardless of whether the system state has changed . if the M D 1 queue is empty at i it could still be empty at i 1 and the program will still only advance the clock to time i 1. These instants can correspond to cell slots in ATM. In discrete-event simulation the simulator clock is advanced to the next time for which there is a change in the state of the simulation model . a cell arrival or departure at the M D 1 queue. So we have a choice discrete time advance or discrete event advance. The latter can run more quickly because it will cut out the slot-toslot transitions when the queue is empty but the former is easier to understand in the context of ATM because it is simpler to implement and it models the cell buffer from the point of view of the server process . the conveyor belt of cell slots see Figure . We will concentrate on the discrete time advance mechanism in this introduction. 70 FUNDAMENTALS OF SIMULATION In the case of the synchronized M D 1 queue the obvious events between which the simulator can jump are the end of time slot instants and so the simulator needs to model the following algorithm Ki max 0 K -_i C Ai

• Kĩ thuật Viễn thông
• Thiết kế IP
• hiệu suất IP
• thiết kế ATM
• hiệu suất ATM
• công nghệ Mode
• lưu lượng IP WDM
• thiết kế
• lưu lượng IP
• tín hiệu
• kết nối IP
• dung lượng băng thông
• viễn thông
• mạng máy tính
• mạng IP WDM