TAILIEUCHUNG - Ebook CMOS VLSI design - A circuits and systems perspective (4th edition): Part 2

(BQ) Part 2 book "CMOS VLSI design - A circuits and systems perspective" has contents: Combinational circuit design, sequential circuit design, datapath subsystems, array subsystems, special purpose subsystems, special purpose subsystems; testing, debugging, and verification,. and other contents. | Combinational Circuit Design 9 Introduction Digital logic is divided into combinational and sequential circuits. Combinational circuits are those whose outputs depend only on the present inputs, while sequential circuits have memory. Generally, the building blocks for combinational circuits are logic gates, while the building blocks for sequential circuits are registers and latches. This chapter focuses on combinational logic; Chapter 10 examines sequential logic. In Chapter 1, we introduced CMOS logic with the assumption that MOS transistors act as simple switches. Static CMOS gates used complementary nMOS and pMOS networks to drive 0 and 1 outputs, respectively. In Chapter 4, we used the RC delay model and logical effort to understand the sources of delay in static CMOS logic. In this chapter, we examine techniques to optimize combinational circuits for lower delay and/or energy. The vast majority of circuits use static CMOS because it is robust, fast, energy-efficient, and easy to design. However, certain circuits have particularly stringent speed, power, or density restrictions that force another solution. Such alternative CMOS logic configurations are called circuit families. Section examines the most commonly used alternative circuit families: ratioed circuits, dynamic circuits, and passtransistor circuits. The decade roughly spanning 1994–2004 was the heyday of dynamic circuits, when high-performance microprocessors employed ever-more elaborate structures to squeeze out the highest possible operating frequency. Since then, power, robustness, and design productivity considerations have eliminated dynamic circuits wherever possible, although they remain important for memory arrays where the alternatives are painful. Similarly, other circuit families have been removed or relegated to narrow niches. Recall from Section that the delay of a logic gate depends on its output current I, load capacitance C, and output voltage swing V C () V I Faster .

• Kỹ thuật lập trình
• CMOS VLSI design
• A circuits and systems perspective
• Combinational circuit design
• Sequential circuit design
• Special purpose subsystems
• Special purpose subsystems
• Lecture Design and Implementation of VLSI systems
• Bài giảng Thiết kế và Triển khai hệ thống VLSI
• Design and Implementation of VLSI systems
• CMOS logic
• nMOS transistor
• pMOS transistor
• CMOS fabrication
• Remove oxide from anneal
• Chemical vapor deposition
• Circuit simulation
• MOS transistor theory
• CMOS processing technology
• Historical perspective
• Device models
• Device characterization
• modern Design
• chip design
• unsurpassed circuit level coverage
• microprocessors
• computer arithmetic
• Electronic Engineering
• CMOS chip
• CMOS transistors
• Integrated circuits
• Building logic gates
• systems perspective
• Circuits
• English majors
• English textbooks
• college materials
• Design 4th Edition
• Solutions for CMOS
• series transistors
• Design for Low Power
• CMOS VLSI Design
• Power and Energy
• Dynamic Power
• Static Power
• Low Power Design
• Thermal Management
• Carbon Nanotube
• Graphene Based Devices
• CMOS Technology
• Sat Encoded Problems
• Distribution Networks