TAILIEUCHUNG - EURASIP Journal on Applied Signal Processing 2003:7, 676–689 c 2003 Hindawi Publishing

EURASIP Journal on Applied Signal Processing 2003:7, 676–689 c 2003 Hindawi Publishing Corporation High Fill-Factor Imagers for Neuromorphic Processing Enabled by Floating-Gate Circuits Paul Hasler Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250, USA Email: phasler@ Abhishek Bandyopadhyay Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250, USA Email: abandyo@ David V. Anderson Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250, USA Email: dva@ Received 29 September 2002 and in revised form 16 January 2003 In neuromorphic modeling of the retina, it would be very nice to have processing capabilities at the focal. | EURASIP Journal on Applied Signal Processing 2003 7 676-689 2003 Hindawi Publishing Corporation High Fill-Factor Imagers for Neuromorphic Processing Enabled by Floating-Gate Circuits Paul Hasler Department of Electrical and Computer Engineering Georgia Institute of Technology Atlanta GA 30332-0250 USA Email phasler@ Abhishek Bandyopadhyay Department of Electrical and Computer Engineering Georgia Institute of Technology Atlanta GA 30332-0250 USA Email abandyo@ David V. Anderson Department of Electrical and Computer Engineering Georgia Institute of Technology Atlanta GA 30332-0250 USA Email dva@ Received 29 September 2002 and in revised form 16 January 2003 In neuromorphic modeling of the retina it would be very nice to have processing capabilities at the focal plane while retaining the density of typical active pixel sensor APS imager designs. Unfortunately these two goals have been mostly incompatible. We introduce our transform imager technology and basic architecture that uses analog floating-gate devices to make it possible to have computational imagers with high pixel densities. This imager approach allows programmable focal-plane processing that can perform retinal and higher-level bioinspired computation. The processing is performed continuously on the image via programmable matrix operations that can operate on the entire image or blocks within the image. The resulting dataflow architecture can directly perform computation of spatial transforms motion computations and stereo computations. The core imager performs computations at the pixel plane but still holds a fill factor greater than 40 percent comparable to the high fill factors of APS imagers. Each pixel is composed of a photodiode sensor element and a multiplier. We present experimental results from several imager arrays built in micrometer process up to 128 X 128 in an area of 4 millimeter squared . Keywords and phrases floating-gate circuits CMOS imagers

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