TAILIEUCHUNG - Lecture Computer organization and assembly language: Chapter 13 - Dr. Safdar Hussain Bouk

In this chapter, the following content will be discussed: Instruction cycle, program execution, control flow, JMP and LOOP instructions, JMP instruction, LOOP instruction, LOOP example, summing an integer array, stack operations. | CSC 221 Computer Organization and Assembly Language Lecture 13: Instruction Execution, Flow Control and Stack Related Instructions Lecture 12: Review Programming Examples: Data-Related Operators and Directives OFFSET Operator PTR Operator TYPE Operator LENGTHOF Operator SIZEOF Operator LABEL Directive Lecture 12: Review (cont.) Programming Examples: Indirect Addressing Indirect Operands Array Sum Example Indexed Operands Pointers Lecture Outline Instruction Cycle Program Execution Control Flow JMP and LOOP Instructions JMP Instruction LOOP Instruction LOOP Example Summing an Integer Array Stack Operations Basic Microcomputer Design Clock synchronizes CPU operations. Control unit (CU) coordinates Sequence of Execution Steps. ALU performs arithmetic and bitwise processing Simplified CPU Block Diagram 7 Clock Synchronizes all CPU and BUS operations. Machine (clock) cycle measures time of a single operation. Clock is used to trigger events. Instruction Cycle Each machine language instruction is first fetched from the memory and stored in an Instruction Register (IR). The address of the instruction to be fetched is stored in a register called Program Counter or simply PC. In some computers this register is called the Instruction Pointer or IP. After the instruction is fetched, the PC (or IP) is incremented to point to the address of the next instruction. The fetched instruction is decoded (to determine what needs to be done) and executed by the CPU. Instruction Execution Cycle Obtain instruction from program storage Determine required actions and instruction size Locate and obtain operand data Compute result value and status Deposit results in storage for later use Instruction Decode Instruction Fetch Operand Fetch Execute Writeback Result Infinite Cycle Timing Diagram Memory Read Cycle Instruction Execution Cycle I2 I3 I4 PC program I1 instruction register op1 op2 memory fetch ALU registers write decode execute read write (output) registers flags . . . I1 (cont.) .

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