TAILIEUCHUNG - A Fast Cryptography Pipelined Hardware developed in FPGA with VHDL

Universidade Federal de Itajubá – UNIFEI Itajubá - Brazil Abstract – This article describes the core implementation of an Advanced Encryption Standard - AES in Field Programmable Gate Array - FPGA. The core was implemented in both Xilinx Spartan-3 and Xilinx Virtex-5 FPGAs. The algorithm was implemented for 128 bits word and key. The implementation was very efficient, achieving 318MHz on a Xilinx Spartan-3, representing at 50% faster than other reported works. The implementation can achieve 800MHz on a Xilinx Virtex-5. The main goal of this work was the implementation of a fast and modular AES algorithm, as it can. | A Fast Cryptography Pipelined Hardware developed in fPgA with VHDL Otávio S. M. Gomes Robson L. Moreno and Tales C. Pimenta Universidade Federal de Itajuba - UNIFEI Itajuba - Brazil Abstract - This article describes the core implementation of an Advanced Encryption Standard - AES in Field Programmable Gate Array - FPGA. The core was implemented in both Xilinx Spartan-3 and Xilinx Virtex-5 FPGAs. The algorithm was implemented for 128 bits word and key. The implementation was very efficient achieving 318MHz on a Xilinx Spartan-3 representing at 50 faster than other reported works. The implementation can achieve 800MHz on a Xilinx Virtex-5. The main goal of this work was the implementation of a fast and modular AES algorithm as it can be easily reconfigured to 128 196 or 256 bits key and can find a wide range of applications. Nevertheless all the reported works used as comparison basis to our work were also implemented using 128 bits key. A pipelined hardware was implemented and it was compared with nonpipelined version as a result was achieved an increase in the efficiency. Keywords Cryptography AES DES FPGA efficient encryption decryption implementation pipeline security communications. I. Introduction In 1997 the National Institute of Standards and Technology - NIST released a contest to choose a new symmetric cryptograph algorithm that would be called Advanced Encryption Standard - AES to be used to protect confidential data in the USA. The algorithm should meet few requirements such as copyright free faster than the 3DES cryptograph of 128 bit blocks using 128 192 and 256 bit keys possibility of hardware and software implementation among others. In 2000 after analysis by cryptography experts it was chosen the winner Rijndael. The algorithm was created by the Belgians Vincent Rijmen e Joan Daemen 1 2 . Hardware-based cryptography is used for authentication of users and of software updates and installations. Software implementations can generally not be used for .

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• DES
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• efficient encryption
• decryption
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