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Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: MOCDEX: Multiprocessor on Chip Multiobjective Design Space Exploration with Direct Execution | Hindawi Publishing Corporation EURASIP Journal on Embedded Systems Volume 2006 Article ID 54074 Pages 1-14 DOI 10.1155 ES 2006 54074 MOCDEX Multiprocessor on Chip Multiobjective Design Space Exploration with Direct Execution Riad Ben Mouhoub and Omar Hammami UEI ENSTA 32 Boulevard Victor 75739 Paris France Received 15 December 2005 Revised 5 May 2006 Accepted 2 June 2006 Fully integrated system level design space exploration methodologies are essential to guarantee efficiency of future large scale system on programmable chip. Each design step in the design flow from system architecture to place and route represents an optimization problem. So far different tools computer architecture design automation are used to address each problem separately with at best estimation techniques from one level to another. This approach ignores the various and very diverse vertical relations between distinct levels parameters and provides at best local optimization solutions at each step. Due to the large scale of SoC system level design methodologies need to tackle the system design process as a global optimization problem by fully integrating physical design in the design space exploration. We propose MOCDEX a multiobjective design space exploration methodology for multiprocessor on chip which closes the gap between these associated tools in a fully integrated approach and with hardware in the loop. A case study of a 4-way multiprocessor demonstrates the validity of our approach. Copyright 2006 R. B. Mouhoub and O. Hammami. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use distribution and reproduction in any medium provided the original work is properly cited. 1. INTRODUCTION System on chip are increasingly becoming complex to design test and fabricate. SoC design methodologies make intensive use of intellectual properties IPs 1 to reduce the design cycle time and meet stringent time to market constraints. .
