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Tham khảo tài liệu 'solid state circuits technologies part 3', kỹ thuật - công nghệ, cơ khí - chế tạo máy phục vụ nhu cầu học tập, nghiên cứu và làm việc hiệu quả | 52 Solid State Circuits Technologies Fig. 3. Experimental Ids versus VDS characteristics of the NMOS transistor with physical gate oxide thickness of 300 Ẵ a L 10 pm W 10 pm b L 3 pm W 10 pm. For short-channel MOS transistors L 1 pm Taur et al. 1993 proposed that the drain current saturation which occurs at VDS smaller than the long-channel current-saturation drain voltage VDsat VGS - Vth sat is caused by velocity saturation. From Fig.4 when the lateral electric field Elateral is small i.e. VDS is low the drift velocity vdrift is proportional to Elateral with ff as the proportionality constant. When Elateral is further increased to the critical electric field Ecritical that is around 104 V cm Vdrift approaches a constant known as the saturation velocity vsat Thornber 1980 . Based on the time-of-flight measurement at temperature of 300 K vsat for electrons in silicon is 107 cm s while vsat for holes in silicon is 6x106 cm s Norris Gibbons 1967 . Fig. 4. Schematic diagram of the drift velocity veff as a function of the lateral electric field Elateral . Note that Elateral VDS Leff . According to the velocity saturation model the equation of the saturation Ids for the nanoscale MOS transistor is given by Taur Ning 1998 c Ids vsatWCox VGS Vth sat 5 53 The Evolution of Theory on Drain Current Saturation Mechanism of MOSFETs from the Early Days to the Present Day In contrast with the theoretical predictions that vsat is independent of Ầeữ Thornber 1980 the experimental data show that the carrier velocity in the nanoscale transistor and the low-field mobility are actually related Khakifirooz Antoniadis 2006 . This can be better understood as follows. The effects of strain on ụeff can be investigated qualitatively in a simple way through Drude model eff qT m where T is the momentum relaxation time m is the effective conductivity mass and q is the electron charge Sun et al. 2007 . For 110 NMOS transistors that are fabricated on 100 Si substrate there are four in-plane .