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Models in Hardware Testing- P9:Model based testing is one of the most powerful techniques for testing hardware and software systems.While moving forward to nanoscaled CMOS circuits, we observe a plethora of new defect mechanisms, which require increasing efforts in systematic fault modeling and appropriate algorithms for test generation, fault simulation and diagnosis. | 234 J. Arlat and Y. Crouzet 8.2.5.1 Implementation Rules for Detecting Single Errors For detection techniques targeting single errors the main functional constraint is that the various outputs of the circuit should be produced by independent circuits slices i.e. circuits that have no common link except possibly input connections. Such a constraint enables the detection of all the faults that induce single errors only. A set of implementation rules enables the detection of opens of interconnections or of supply lines that can produce unidirectional errors when they are shared by more than one output. These rules concern the delivery of a common signal to several slices common variables power supplies . They can be summarized as follows R10 Check the signal R20 Distribute the signal in such a way that an open only affects one slice or if it affects more than one slice it affects also the checker no supply to the checker means that the two outputs are at the same value which corresponds to the detection of an error . In Fig 8.9 we illustrate the two main alternatives. Figure 8.9a depicts the use of a splitting node and Fig. 8.9b describes the use of a main line with the checker located at the physical end of this line. In the latter case the divergences are only allowed if they supply several gates inside the same slice. a common input or power supply towards the checker towards the different slices Fig. 8.9 Main alternatives for single errors a splitting node. b checkers located at the end of the lines. Splitting node. C checker ----- forbidden connections Checkers located at the end of the lines. 8 Physical Fault Models and Fault Tolerance 235 8.2.5.2 Implementation Rules for Detecting Unidirectional Errors To make the detection of all the unidirectional errors feasible the implementation of the circuit should be inverter-free. This is impossible with MOS technology because all basic gates are inverting ones. Thus unidirectional errors internal to the circuit can .
