TAILIEUCHUNG - Models in Hardware Testing- P6

Models in Hardware Testing- P6:Model based testing is one of the most powerful techniques for testing hardware and software moving forward to nanoscaled CMOS circuits, we observe a plethora of new defect mechanisms, which require increasing efforts in systematic fault modeling and appropriate algorithms for test generation, fault simulation and diagnosis. | 5 Generalized Fault Modeling for Logic Diagnosis 141 Fig. Example of aliasing in diagnosis. The response to a test set in a is explained by a single stuck-at fault. The defective behavior is actually more complex because the additional test in b produces a 0 at the output a Test set detects all single stuck-at faults 1 0 1 1 0 1 0 1 1 0 1 0 1 1 0 1 Possible x 1 1 1 1 explanation b Improved test set 1 0 1 1 0 0 1 0 1 1 1 0 1 0 1 1 1 0 1 0 1 1 1 0 Possible explanation The first part of the condition is true if there is an event on line a and the second part is true if the final value of a is different from the current value of line b. At the first glance the explanations for observed responses with the minimum number of CLFs are the most reasonable ones however there is the risk of aliasing as demonstrated in Fig. . Thus not only the number of CLFs but also the complexity of their conditions should be considered. In most cases the goal for production test generation is to achieve high stuck-at fault coverage. It is likely that standard ATPG would generate the four patterns shown in case a . This test set provides complete single stuck-at fault coverage and leads to two fails. The most reasonable explanation of this behavior is a stuck-at 1 at the output x. However if one additional pattern is added to the test set like in case b the circuit produces a 0. This response cannot be explained anymore by a stuck-at fault at the output. In fact there exists no single stuck-at fault which would produce such a response. One possible explanation involves two stuck-at faults at lines a and d. 142 . Wunderlich and S. Holst Other General Fault Models The idea of generalizing fault modeling to describe complex defects is not new. However the main motivation of the previous works was more related to test generation than to diagnosis. For efficient test generation the initial values of internal signals the preconditions and the fault effects have to be given .

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