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Handbook of Algorithms for Physical Design Automation part 40 provides a detailed overview of VLSI physical design automation, emphasizing state-of-the-art techniques, trends and improvements that have emerged during the previous decade. After a brief introduction to the modern physical design problem, basic algorithmic techniques, and partitioning, the book discusses significant advances in floorplanning representations and describes recent formulations of the floorplanning problem. The text also addresses issues of placement, net layout and optimization, routing multiple signal nets, manufacturability, physical synthesis, special nets, and designing for specialized technologies. It includes a personal perspective from Ralph Otten as he looks back on. | 372 Handbook of Algorithms for Physical Design Automation a b FIGURE 18.12 Illustration of the adaptec2 circuit from the ISPD05 benchmark suite 39 where a shows the circuit s fixed obstacles and I O pads before placement and b shows that after the placement of cells after a single QP many cells may become trapped or blocked by fixed obstacles. slot constraints on the placement problem. An illustration of heterogeneous resources within Altera s HC230 structured ASIC is shown in Figure 18.13. Although APlace 32 handles geometric constraints slot constraints represent another type of constraint not properly handled geometrically. So the question arises as to what is the best method to handle discrete slot constraints during force-directed placement. Traditional force-directed placers cannot compel heterogeneous cells to be placed at discrete slots in the best case these methods can coerce heterogeneous cells toward discrete slots. In Ref. 41 an extension to a force-directed placer to handle heterogeneous resources is presented. In effect the cell distributions for different types of cells are maintained in separate layers spreading forces for different types of cells are computed in the appropriate layer. This enhancement was shown to yield placements where cells are placed reasonably closely to the appropriate type of resource. Once again however it is worthwhile to ask if Force-Directed and Other Continuous Placement Methods 373 M4K RAM blocks M4K RAM blocks Doe1 Array Doe1 of HCells 8l 8 8 8 8 8 8 8 8 8 8 8 Fast PLL Array of HCells of HCells of HCells FIGURE 18.13 Partial floorplan of an HC230 structured ASIC 42 . Heterogeneous resources including I Os M4K RAMs PLLs and mega-RAMs must be placed into disjoint slots. From Altera corporation Hard Copy Series Handbook Altera 2005. With permission. even more effective techniques for dealing with heterogeneous resources can be developed because the placement of these resources can have a large impact on the overall .
