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| Computer Architecture Chapter 5 Memory Hierarchy Design Prof. Jerry Breecher CSCI 240 Fall 2003 Chap. 5 - Memory Chapter Overview 5.1 Introduction 5.2 The ABCs of Caches 5.3 Reducing Cache Misses 5.4 Reducing Cache Miss Penalty 5.5 Reducing Hit Time 5.6 Main Memory 5.7 Virtual Memory 5.8 Protection and Examples of Virtual Memory Chap. 5 - Memory Introduction 5.1 Introduction 5.2 The ABCs of Caches 5.3 Reducing Cache Misses 5.4 Reducing Cache Miss Penalty 5.5 Reducing Hit Time 5.6 Main Memory 5.7 Virtual Memory 5.8 Protection and Examples of Virtual Memory The Big Picture: Where are We Now? The Five Classic Components of a Computer Control Datapath Memory Processor Input Output Topics In This Chapter: SRAM Memory Technology DRAM Memory Technology Memory Organization Chap. 5 - Memory Technology Trends DRAM Year Size Cycle Time 1980 64 Kb 250 ns 1983 256 Kb 220 ns 1986 1 Mb 190 ns 1989 4 Mb 165 ns 1992 16 Mb 145 ns 1995 64 Mb 120 ns Capacity Speed (latency) Logic: 2x in 3 . | Computer Architecture Chapter 5 Memory Hierarchy Design Prof. Jerry Breecher CSCI 240 Fall 2003 Chap. 5 - Memory Chapter Overview 5.1 Introduction 5.2 The ABCs of Caches 5.3 Reducing Cache Misses 5.4 Reducing Cache Miss Penalty 5.5 Reducing Hit Time 5.6 Main Memory 5.7 Virtual Memory 5.8 Protection and Examples of Virtual Memory Chap. 5 - Memory Introduction 5.1 Introduction 5.2 The ABCs of Caches 5.3 Reducing Cache Misses 5.4 Reducing Cache Miss Penalty 5.5 Reducing Hit Time 5.6 Main Memory 5.7 Virtual Memory 5.8 Protection and Examples of Virtual Memory The Big Picture: Where are We Now? The Five Classic Components of a Computer Control Datapath Memory Processor Input Output Topics In This Chapter: SRAM Memory Technology DRAM Memory Technology Memory Organization Chap. 5 - Memory Technology Trends DRAM Year Size Cycle Time 1980 64 Kb 250 ns 1983 256 Kb 220 ns 1986 1 Mb 190 ns 1989 4 Mb 165 ns 1992 16 Mb 145 ns 1995 64 Mb 120 ns Capacity Speed (latency) Logic: 2x in 3 years 2x in 3 years DRAM: 4x in 3 years 2x in 10 years Disk: 4x in 3 years 2x in 10 years 1000:1! 2:1! Introduction The Big Picture: Where are We Now? Here is a table showing you quantitatively what I mean by high density. In 1980, the biggest DRAM chip you can buy has around 64Kb on it and their cycle time is around 250ns. This year you can buy 64 Mb DRAMs chips, that is an order of magnitude bigger than those back in 1980 with a speed that is twice as fast. The general rule for DRAM has been quadruple in size every 3 years. We will talk about DRAM cycle time later today. For now, I want you to point out an important point: The logic speed of your processor is doubling every 3 years but the DRAM speed only gets 40% improvement every 10 years. This mean DRAM speed relative to your processor is getting slower every day. That is why we believe Memory System design will become more and more important in the future because getting to your DRAM will become one of the biggest bottlenecks. .
