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Model-Based Design for Embedded Systems- P59

Model-Based Design for Embedded Systems- P59: This book contains information obtained from authentic and highly regarded sources. Reasonable efforts have been made to publish reliable data and information, but the author and publisher cannot assume responsibility for the validity of all materials or the consequences of their use. | 566 Model-Based Design for Embedded Systems invoked the director must manage the execution of the inside model so that input data if any are read and output data are produced. When postfire is invoked the director must update the state of the inside actors by invoking their postfire methods. Obviously directors must be carefully designed to obey the actor abstract semantics contract. By obeying it they gain the ability to be nested arbitrarily with other directors that also obey the contract. The communication across the hierarchical boundary will likely end up heterogeneous. In Figure 17.1 the connection between the TrigFunction actor and the external port will be a channel obeying SR semantics that is it will be realized as a simple buffer with length one support for unknown state and enforcement of monotonicity constraints . The connection between the external port and some other port on the outside will obey the semantics of whatever director is provided on the outside. This need not be the same as the SR semantics. In this chapter we will focus on the use of three directors in Ptolemy II implementing SR DE and CT MoCs. 17.5 Synchronous Reactive Models We begin with the principle of synchronous languages but used in the style of a coordination language rather than a programming language as done in Ptolemy 17 and ForSyDe 44 . We will show that by adding time to this we get a clean semantics for DE systems and that by adding continuous dynamics we get a clean semantics for CT hybrid and mixed signal systems CT models . The principle behind synchronous languages is simple although the consequences are profound 4 . Execution follows ticks of a global clock. At each tick each variable represented visually by the wires that connect the blocks may have a value it can also be absent having no value . Its value or absence of value is defined by functions associated with each block. That is at each tick each block is a function from input values to output values the .