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Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: Research Article An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction | Hindawi Publishing Corporation EURASIP Journal on Embedded Systems Volume 2009 Article ID 973976 10 pages doi 10.1155 2009 973976 Research Article An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction Ji Gu and Hui Guo School of Computer Science and Engineering The University of New South Wales Sydney 2052 Australia Correspondence should be addressed to Ji Gu jigu@cse.unsw.edu.au Received 20 January 2009 Accepted 3 July 2009 Recommended by Antonio Nunez This paper presents a bus coding methodology for the instruction memory data bus switching reduction. Compared to the existing state-of-the-art multiway partial bus-invert MPBI coding which relies on data bit correlation our approach is very effective in reducing the switching activity of the instruction data buses since little bit correlation can be observed in the instruction data. Our experiments demonstrate that the proposed encoding can reduce up to 42 of switching activity with an average of 30 reduction while MPBI achieves just 17.6 reduction in switching activity. Copyright 2009 J. Gu and H. Guo. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use distribution and reproduction in any medium provided the original work is properly cited. 1. Introduction Designs of portable consumer electronic devices such as mobile phones PDAs video games and other embedded systems are increasingly demanding low power consumption to maximize the battery life reduce weight and improve reliability. These types of power sensitive devices are usually equipped with microprocessors as the processing elements and memories as the storage units. With current CMOS technology a large portion of power consumption is consumed in the form of dynamic power which in turn is determined by the bit switching and the switched load capacitance. Leakage power becomes unneglectable in nanoscaled devices. However leakage power .
