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In this chapter: To provide a detailed description of various ways of organizing memory hardware, to discuss various memory-management techniques, including paging and segmentation, to provide a detailed description of the Intel Pentium, which supports both pure segmentation and segmentation with paging. | Chapter 8: Main Memory Operating System Concepts – 9th Edition Silberschatz, Galvin and Gagne ©2013 Chapter 8: Memory Management Background Swapping Contiguous Memory Allocation Segmentation Paging Structure of the Page Table Example: The Intel 32 and 64-bit Architectures Example: ARM Architecture Operating System Concepts – 9th Edition 8.2 Silberschatz, Galvin and Gagne ©2013 Objectives To provide a detailed description of various ways of organizing memory hardware To discuss various memory-management techniques, including paging and segmentation To provide a detailed description of the Intel Pentium, which supports both pure segmentation and segmentation with paging Operating System Concepts – 9th Edition 8.3 Silberschatz, Galvin and Gagne ©2013 Background Program must be brought (from disk) into memory and placed within a process for it to be run Main memory and registers are only storage CPU can access directly Memory unit only sees a stream of addresses + read requests, or address + data and write requests Register access in one CPU clock (or less) Main memory can take many cycles, causing a stall Cache sits between main memory and CPU registers Protection of memory required to ensure correct operation Operating System Concepts – 9th Edition 8.4 Silberschatz, Galvin and Gagne ©2013 Base and Limit Registers A pair of base and limit registers define the logical address space CPU must check every memory access generated in user mode to be sure it is between base and limit for that user Operating System Concepts – 9th Edition 8.5 Silberschatz, Galvin and Gagne .
