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Chapter 7 covers the construction and VHDL description of more sophisticated combinational circuits. Examples show how to transform conceptual ideas into hardware, and illustrate resource-sharing and circuit-shaping techniques to reduce circuit size and increase performance. | Combinational Circuit Design: Practice RTL Hardware Design by P. Chu Chapter 7 1 Outline 1. 2. 3. 4. 5. Derivation of efficient HDL description Operator sharing Functionality sharing Layout-related circuits General circuits RTL Hardware Design by P. Chu Chapter 7 2 1. Derivation of efficient HDL description • Think “H”, not “L”, of HDL • Right way: – Research to find an efficient design (“domain knowledge”) – Develop VHDL code that accurately describes the design • Wrong way: – Write a C program and covert it to HDL RTL Hardware Design by P. Chu Chapter 7 3 Sharing • Circuit complexity of VHDL operators varies • Arith operators – Large implementation – Limited optimization by synthesis software • “Optimization” can be achieved by “sharing” in RT level coding – Operator sharing – Functionality sharing RTL Hardware Design by P. Chu Chapter 7 4 An example 0.55 um standard-cell CMOS implementation RTL Hardware Design by P. Chu Chapter .
