TAILIEUCHUNG - Lecture VLSI Digital signal processing systems: Chapter 11 - Keshab K. Parhi

Chapter 11 - Scaling and round-off noise includes content: Scaling and round-off noise; state variable description of digital filters; scaling and round-off noise computation; round-off noise computation using state variable description; slow-down, retiming, and pipelining. | Chapter 11: Scaling and Round-off Noise Keshab K. Parhi Outline • • • • • Introduction Scaling and Round-off Noise State Variable Description of Digital Filters Scaling and Round-off Noise Computation Round-off Noise Computation Using State Variable Description • Slow-Down, Retiming, and Pipelining Chapter 11 2 Introduction • In a fixed-point digital filter implementation, the overall input-output behavior is non-ideal. The quantization of signals and coefficients using finite word-lengths and propagation of roundoff noises to the output are the sources of noise. • Other undesirable behavior include limit-cycle oscillations where undesirable periodic components are present at filter output even in the absence of any input. These may be caused due to internal rounding or overflow. Scaling is often used to constrain the dynamic range of the variables to a certain word-length State variable description of a linear filter: provides a mathematical formulation for studying various structures. These are most useful to compute quantities that depend on the internal structure of the filter. Power at each internal node and the output round-off noise of a digital FIR/IIR filter can be easily computed once the digital filter is described in state variable form • • Chapter 11 3 Scaling and Round-off Noise Scaling Operation • Scaling: A process of readjusting certain internal gain parameters in order to constrain internal signals to a range appropriate to the hardware with the constraint that the transfer function from input to output should not be changed • Illustration: – The filter in (a) with unscaled node x has the transfer function () H ( z) = D( z) + F ( z)G(z) – To scale the node x, we divide F(z) by some number β and multiply G(z) by the same number as in (b). Although the transfer function does not change by this operation, the signal level at node x has been changed Chapter 11 4 D(z) OUT IN F(z) x (a) G(z) D(z) OUT IN F(z)/β

• Điện - Điện tử
• VLSI Digital signal processing systems
• Digital signal
• Digital signal processing
• DSP systems
• Round off noise
• State variable description
• FIR Digital Filters
• Parallel processing
• Loop bound
• DSP programs
• Retiming formulation
• Applications of retiming
• Algorithm for unfolding
• Applications of unfolding
• Retiming for folding
• Systolic architecture design
• Projection vector
• Cook toom algorithm
• Fast convolution
• Algorithmic strength reduction
• Parallel FIR filters
• Adaptive filters
• Parallel pecursive
• Bit level arithmetic architectures
• Parallel multipliers
• Redundant arithmetic
• Redundant number representations
• Numerical strength reduction
• Multiple constant multiplication
• Low power design
• Programmable DSPs
• DSP applications