# TAILIEUCHUNG - Adaptive WCDMA (P2)

## Pseudorandom sequences PROPERTIES OF BINARY SHIFT REGISTER SEQUENCES Let us deﬁne a polynomial h(x) = h0 x n + h1 x n−1 + · · · + hn−1 x + hn () in a discrete ﬁeld with two elements hi ∈ (0, 1) and h0 = hn = 1. An example of a polynomial could be x 4 + x + 1 or x 5 + x 2 + 1. The coefﬁcients hi of the polynomial can be represented by binary vectors 10011 and 100101, or in octal notation 23 and 45 (every group of three bits is represented by a number. | Adaptive WCDMA Theory And Practice. Savo G. Glisic Copyright 2003 John Wiley Sons Ltd. ISBN 0-470-84825-1 2 Pseudorandom sequences PROPERTIES OF BINARY SHIFT REGISTER SEQUENCES Let us define a polynomial h x h0x h1x -1 hn-1x hn in a discrete field with two elements hi e 0 1 and h0 hn 1. An example of a polynomial could be x4 x 1 or x5 x2 1. The coefficients hi of the polynomial can be represented by binary vectors 10011 and 100101 or in octal notation 23 and 45 every group of three bits is represented by a number between 0 and 7 . A binary sequence u is said to be a sequence generated by h x if for all integers j h0Uj h1Uj 1 h Uj 2 h Uj-n 0 addition modulo 2 If we formally change the variables j h then equation becomes Uj h Uj h -1Uj 1 h1Uj -1 In this notation Uj is the jth bit called chip of the sequence u. The sequence u can be generated by an n-stage binary linear feedback shift register which has a feedback tap connected to the ith cell if hi 1 0 i n. 24 PSEUDORANDOM SEQUENCES Example 1 For n 5 equation becomes Uj 5 h5Uj h4Uj 1 h3Uj 2 h2Uj 3 hlUj 4 For the polynomial x5 x2 1 the octal representation 45 of the coefficients hi are ho hi h2 h3 h4 h5 10 0 10 1 and the block diagram of the circuit is shown in Figure . Example 2 For the polynomial x5 x4 x3 x2 1 the coefficients hi are given as h0 h1 h2 h3 h4 h5 11110 1 75 and by using equation one can get the generator shown in Figure . Some of the properties of these sequences and definitions are listed below. Details can be found in the standard literature listed at the end of the chapter especially in References 1-12 . If u and v are generated by h x then so is u v where u v denotes the sequence whose ith element is ui vi. All zero state of the shift register is not allowed because for this initial state equation would continue to generate zero chips. For this reason the period of u is at most 2n 1 where n is the number of cells in the Figure Sequence generator for

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