TAILIEUCHUNG - Handbook of algorithms for physical design automation part 97

Handbook of Algorithms for Physical Design Automation part 97 provides a detailed overview of VLSI physical design automation, emphasizing state-of-the-art techniques, trends and improvements that have emerged during the previous decade. After a brief introduction to the modern physical design problem, basic algorithmic techniques, and partitioning, the book discusses significant advances in floorplanning representations and describes recent formulations of the floorplanning problem. The text also addresses issues of placement, net layout and optimization, routing multiple signal nets, manufacturability, physical synthesis, special nets, and designing for specialized technologies. It includes a personal perspective from Ralph Otten as he looks back on. | 942 Handbook of Algorithms for Physical Design Automation to map a circuit to an application specific integrated circuit ASIC . The next chapter will describe the physical design algorithms for FPGAs this chapter sets the stage by describing the architecture of FPGAs. Section describes several programming technologies Section describes logic block architectures Section describes routing architectures and Sections and describe embedded memories and embedded computation blocks. PROGRAMMING TECHNOLOGIES The circuit being implemented on an FPGA is stored in the FPGA using a set of configuration bits. These bits can be constructed in various ways this section describes static random access memory SRAM Flash and antifuse-based configuration bits. These schemes are all used in contemporary commercial FPGAs many FPGAs vendors such as Xilinx Altera and Lattice use SRAM configurable bits to control the programmable switches to configure routing and logic Altera05 Lattice05 Xilinx05a . Actel produces both Flash and antifuse FPGA products Actel05a . QuickLogic uses antifuse technology in their products Quick05 . Table provides a comparison among these three technologies details on each are provided below. FPGAs based on emerging technologies have also been described Ferrera04 Dehon05 but because they are not commercially available yet they will not be discussed further here. SRAM-Based FPGAs The most popular scheme to implement configuration bits is to use SRAM cells. SRAM technology is fast and allows for reprogrammability. In addition SRAM bits can be implemented using standard complementary metal-oxide-semiconductor CMOS processes meaning FPGAs using SRAMs can be implemented in leading-edge processes. shows a typical six-transistor SRAM memory cell. It uses the data bit in both the true and complement forms to achieve fast read and write time Trimberger94 . Although a six-transistor cell is generally more stable because .

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