TAILIEUCHUNG - Báo cáo sinh học: " Research Article Algorithms for Optimally Arranging Multicore Memory Structures"

Tuyển tập các báo cáo nghiên cứu về sinh học được đăng trên tạp chí sinh học Journal of Biology đề tài: Research Article Algorithms for Optimally Arranging Multicore Memory Structures | Hindawi Publishing Corporation EURASIP Journal on Embedded Systems Volume 2010 Article ID871510 16 pages doi 2010 871510 Research Article Algorithms for Optimally Arranging Multicore Memory Structures Wei-Che Tseng Jingtong Hu Qingfeng Zhuge Yi He and Edwin . Sha Department of Computer Science University of Texas at Dallas Richardson TX 75080 USA Correspondence should be addressed to Wei-Che Tseng wxt043000@ Received 31 December 2009 Accepted 6 May 2010 Academic Editor Chun Jason Xue Copyright 2010 Wei-Che Tseng et al. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use distribution and reproduction in any medium provided the original work is properly cited. As more processing cores are added to embedded systems processors the relationships between cores and memories have more influence on the energy consumption of the processor. In this paper we conduct fundamental research to explore the effects of memory sharing on energy in a multicore processor. We study the Memory Arrangement MA Problem. We prove that the general case of MA is NP-complete. We present an optimal algorithm for solving linear MA and optimal and heuristic algorithms for solving rectangular MA. On average we can produce arrangements that consume 49 less energy than an all shared memory arrangement and 14 less energy than an all private memory arrangement for randomly generated instances. For DSP benchmarks we can produce arrangements that on average consume 20 less energy than an all shared memory arrangement and 27 less energy than an all private memory arrangement. 1. Introduction When designing embedded systems the application of the system may be known and fixed at the time of the design. This grants the designer a wealth of information and the complex task of utilizing the information to meet stringent requirements including power consumption and timing constraints. To meet timing constraints designers

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