TAILIEUCHUNG - Advances in Solid State Part 7

Tham khảo tài liệu 'advances in solid state part 7', kỹ thuật - công nghệ, cơ khí - chế tạo máy phục vụ nhu cầu học tập, nghiên cứu và làm việc hiệu quả | Continuous-Time Analog Filtering Design Strategies and Programmability in CMOS Technologies for VHF Applications 171 control the HS transconductance from 270 to 452 gA V and changes from 40 to 100 gA in the FC topology control the transconductance from 550 to 800 gA V. V mV a b Fig. 15. Transconductance versus biasisng currents fine tuning for the a HS implementation b FC implementation. To conclude the proposed structure is a balanced topology aimed at improving immunity to digital noise and linearity. A digitally programmable transconductor has been designed maintaining the same dynamic range over the entire frequency range. Therefore it can be used in the design of programmable filters as the expected characteristics of a programmable cell will be obtained to maintain Q-factor noise power and maximum signal swing constant over the entire programming range leading to a DR independent on the operation frequency. The expected linear dependence of the unity-gain frequency is obtained and the phase error is effectively reduced over the entire programming range in both implementations with a compensation scheme based on two cross-coupled capacitors for the HS topology and the classical RC circuit connected at the input for the FC approach. 8. Results and discussion To demonstrate the theoretical advantages of this approach for a programmable transconductor suitable for VHF two 3-bit programmable integrators have been designed. The HS transconductor has been implemented by using the design kit of an AMI Semiconductor AMIS gm CMOS technology P-substrate N-well 5-metal 2-poly with a 3 V power supply and a nominal bias current of 90 gA per branch whereas the FC transconductor has been implemented by using the design kit of an AMS C35B4C3 gm CMOS technology P-substrate N-well 4-metal 2-poly with a 2 V power supply and a nominal bias current of 100 gA per branch. The dimensions of the transistors were chosen in order to cover all the design requirements obtained .

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