TAILIEUCHUNG - ARM Architecture Reference Manual- P17

ARM Architecture Reference Manual- P17: The ARM instruction set architecture has evolved significantly since it was first developed, and will continue to be developed in the future. In order to be precise about which instructions exist in any particular ARM implementation, five major versions of the instruction set have been defined to date. | Introduction to Memory and System Architectures -------Note ------------------ Because of the wide variety of systems based on ARM processors all functionality described in Part B might be inappropriate to any given system. Furthermore some ARM processors have implemented functions in a different manner to the one described here. Because of this the datasheet or Technical Reference Manual for a particular ARM processor is the definitive source for its memory and system control facilities. Part B therefore does not attempt to specify absolute requirements on the functionality of the System Control coprocessor or other memory system components. Instead it contains guidelines which if followed mean that the system is more likely to be compatible with existing and future ARM software. probably make it easier to port incompatible software to the system. In order to provide an adequate description of the range of memory and system facilities on existing ARM implementations PartB describes a number of options that will not be used on new ARM implementations. For information on the rules that must be followed by new implementations of the memory and system architectures contact ARM Ltd. The fact that PartB describes a broad range of facilities many of which are used only on some existing ARM implementations also means that architecture version numbers for the memory and system architectures would not be helpful or descriptive. They are therefore not used. ARM DDI 0100E Copyright 1996-2000 ARM Limited. All rights reserved. B1-3 Introduction to Memory and System Architectures System-level issues This section lists a number of general and operating-system issues that the system designer needs to address when using an ARM processor. Memory systems write buffers and caches ARM processors and software are designed to be connected to a byte-addressed memory. Word and halfword accesses to the memory ignore the alignment of the address and access the naturally-aligned .

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