TAILIEUCHUNG - The 80x86 IBM PC and Compatible Computers- P11

The 80x86 IBM PC and Compatible Computers- P11: Praised by experts for its clarity and topical breadth, this visually appealing, one-stop source on PCs uses an easy-to-understand, step-by-step approach to teaching the fundamentals of 80x86 assembly language programming and PC architecture. Offering users a fun, hands-on learning experience, it uses the Debug utility to show what action the instruction performs, then provides a sample program to show its application. | Read enable RA RB DO D1 D2 D3 WA WB QO Q1 Q2 Q3 Write enable Figure 15-13. Inside the 74LS67O Reprinted by permission of Texas Instruments Copyright Texas Instruments Corporation 1988 Review Questions 1. What port addresses are assigned to the 8237 in the PC XT 2. What port address is assigned to the command register of the 8237 in the PC XT 3. If the 8237 has only AO - A7 how is the 16-bit address AO - A15 provided 4. What is the function of ADSTB Is it an out or in signal pin for the 8237 5. The 8237 in the IBM PC XT is programmed to have channel_as the highest priority and channel _as the lowest priority. 6. Which IC chip provides the 4-bit address A16 - A19 of the memory location accessed by the DMA 7. What port addresses are assigned to the DMA file register 8. In the IBM PC XT which DMA channels are used internally by the motherboard for refreshing DRAM and which are available through the expansion slot 9. In the IBM PC XT for DMA 8237 channels 1 2 and 3 what is the DMA data-transfer bus cycle How much time is that if each clock is 210 ns 10. Rework Question 9 for channel 0. SECTION REFRESHING DRAM USING CHANNEL 0 OF THE 8237 Since DREQO has the highest priority in the 8237 the PC designers at IBM assigned to it the task of refreshing DRAM. In other words if the floppy disk and the request for the refresh come at the same time DMA will take care of the refresh request before answering the disk request for service. Otherwise DRAM would lose its data. At power up BIOS initializes channel 0 of the 8237 to prepare it for the DRAM refreshing task. The following shows the values for the various registers and then the programming of the 8237 for initialization. 1. The memory address register is 0000 which does not need to be programmed and can use the default value of 0000. 2. The count register is FFFF for all the 64K locations written to port address 01. 3. The mode register that must be sent to port address 0BH

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