TAILIEUCHUNG - Lecture VLSI Digital signal processing systems: Chapter 3 - Keshab K. Parhi

In this chapter discuss the pipelining and parallel processing. The main contents of this chapter include all of the following: Pipelining of FIR digital filters, parallel processing, pipelining and parallel processing for low power. | Chapter 3: Pipelining and Parallel Processing Keshab K. Parhi Outline • • • • Introduction Pipelining of FIR Digital Filters Parallel Processing Pipelining and Parallel Processing for Low Power – Pipelining for Lower Power – Parallel Processing for Lower Power – Combining Pipelining and Parallel Processing for Lower Power Chap. 3 2 Introduction • Pipelining – Comes from the idea of a water pipe: continue sending water without waiting the water in the pipe to be out water pipe – leads to a reduction in the critical path – Either increases the clock speed (or sampling speed) or reduces the power consumption at same speed in a DSP system • Parallel Processing – Multiple outputs are computed in parallel in a clock period – The effective sampling speed is increased by the level of parallelism – Can also be used to reduce the power consumption Chap. 3 3 Introduction (cont’d) • Example 1: Consider a 3-tap FIR filter: y(n)=ax(n)+bx(n-1)+cx(n-2) x(n) a x(n-1) D b D x(n-2) TM : multiplica tion − time TA : Addition − time c y(n) – The critical path (or the minimum time required for processing a new sample) is limited by 1 multiply and 2 add times. Thus, the “sample period” (or the “sample frequency” ) is given by: T f Chap. 3 sample ≥ T sample ≤ T M M + 2 T 1 + 2T A A 4 Introduction (cont’d) – If some real-time application requires a faster input rate (sample rate), then this direct-form structure cannot be used! In this case, the critical path can be reduced by either pipelining or parallel processing. • Pipelining: reduce the effective critical path by introducing pipelining latches along the critical data path • Parallel Processing: increases the sampling rate by replicating hardware so that several inputs can be processed in parallel and several outputs can be produced at the same time • Examples of Pipelining and Parallel Processing – See the figures on the next page Chap. .

• Điện - Điện tử
• VLSI Digital signal processing systems
• Digital signal
• Digital signal processing
• DSP systems
• FIR Digital Filters
• Parallel processing
• Loop bound
• DSP programs
• Retiming formulation
• Applications of retiming
• Algorithm for unfolding
• Applications of unfolding
• Retiming for folding
• Systolic architecture design
• Projection vector
• Cook toom algorithm
• Fast convolution
• Algorithmic strength reduction
• Parallel FIR filters
• Adaptive filters
• Parallel pecursive
• Round off noise
• State variable description
• Bit level arithmetic architectures
• Parallel multipliers
• Redundant arithmetic
• Redundant number representations
• Numerical strength reduction
• Multiple constant multiplication
• Low power design
• Programmable DSPs
• DSP applications