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Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: A Novel High-Speed Configurable Viterbi Decoder for Broadband Access | EURASIP Journal onApplied Signal Processing 2003 13 1317-1327 2003 Hindawi Publishing Corporation A Novel High-Speed Configurable Viterbi Decoder for BrOadband Access Mohammed Benaissa Department of Electronic and Electrical Engineering The University of Sheffield Mappin Street Sheffield S1 3JD UK Email m.benaissa@sheffield.ac.uk Yiqun Zhu Department of Electronic and Electrical Engineering The University of Sheffield Mappin Street Sheffield S1 3JD UK Email elp99yz@sheffield.ac.uk Received 31 January 2003 and in revised form 11 September 2003 A novel design and implementation of an online reconfigurable Viterbi decoder is proposed based on an area-efficient addcompare-select ACS architecture in which the constraint length and traceback depth can be dynamically reconfigured. A designspace exploration to trade off decoding capability area and decoding speed has been performed from which the maximum level of pipelining against the number of ACS units to be used has been determined while maintaining an in-place path metric updating. An example design with constraint lengths from 7 to 10 and a 5-level ACS pipelining has been successfully implemented on a Xilinx Virtex FPGA device. FPGA implementation results in terms of decoding speed resource usage and BER have been obtained using a tailored testbench. These confirmed the functionality and the expected higher speeds and lower resources. Keywords and phrases pipelining configurable ACS area-efficient architecture design-space exploration schedule. 1. INTRODUCTION Overcoming the variable deterioration in the reliability of a broadband communication channel in real time is a critical issue. That is why channel-coding techniques such as convolutional codes represent an important part of any broadband communication system. For example DSL WLAN and 3G standards all require variations of convolutional coding with differing coding performance constraint length and code rate at differing data rates and therefore require .