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Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: An Overview of Reconfigurable Hardware in Embedded Systems | Hindawi Publishing Corporation EURASIP Journal on Embedded Systems Volume 2006 Article ID 56320 Pages 1-19 DOI 10.1155 ES 2006 56320 An Overview of Reconfigurable Hardware in Embedded Systems Philip Garcia Katherine Compton Michael Schulte Emily Blem and Wenyin Fu Department of Electrical and Computer Engineering University of Wisconsin-Madison WI53706-1691 USA Received 5 January 2006 Revised 7 June 2006 Accepted 19 June 2006 Over the past few years the realm of embedded systems has expanded to include a wide variety of products ranging from digital cameras to sensor networks to medical imaging systems. Consequently engineers strive to create ever smaller and faster products many of which have stringent power requirements. Coupled with increasing pressure to decrease costs and time-to-market the design constraints of embedded systems pose a serious challenge to embedded systems designers. Reconfigurable hardware can provide a flexible and efficient platform for satisfying the area performance cost and power requirements of many embedded systems. This article presents an overview of reconfigurable computing in embedded systems in terms of benefits it can provide how it has already been used design issues and hurdles that have slowed its adoption. Copyright 2006 Philip Garcia et al. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use distribution and reproduction in any medium provided the original work is properly cited. 1. WHY USE RECONFIGURABLE HARDWARE IN EMBEDDED SYSTEMS Reconfigurable hardware RH provides a flexible medium to implement hardware circuits. The RH resources are configurable and generally reconfigurable post-fabrication allowing a single-base hardware design to implement a variety of circuits. The hardware itself is composed of a set of logic and routing resources controlled by configuration memory. This memory is frequently implemented as SRAM cells though flash RAM and other .